? semiconductor MSM63V89C 1/10 general description the MSM63V89C is a solid-state recorder data register in 1,048,576 words x 1 bit configuration. the MSM63V89C has a built-in internal address generator circuit allowing continuous serial read/ write operation by single external clock input. the internal address is automatically incremented by one by read/write operation. address designation in units of 1024 words in the direction of words is possible by an external serial address input. the built-in refresh timer and refresh counter have eliminated the need of an external refresh circuit and realized a low power consumption. 26/20-pin plastic tsop is used as the package and the operating temperature range is between 0 c and 70 c. the MSM63V89C is suitable for storing large capacity data with battery backup. a solid state recording and playback system can easily be constructed in combination with okis voice synthesizer ics. features ? configuration: 1,048,576 x 1 bit ? serial access operation: serial access time 1.5 m s (3.0 m s) serial read/write cycle time 2.0 m s (4.0 m s) fast mode read/write cycle time 0.4 m s (0.4 m s) times in parentheses indicate ones in self-refresh mode. ? low current consumption: 50 m a max. (for data holding, v cc =3.0 v) ? wide operating supply voltage range: single 2.7 to 3.6v ? auto-refresh/self-refresh changeable ? package: 26/20-pin plastic tsop (tsopii26/20-p-300-1.27-k) (product name: MSM63V89Cts-k) ? semiconductor MSM63V89C 1,048,576-word x 1-bit solid-state recorder data register e2d0034-27-41 preliminary this version: jan. 1998 previous version: may. 1997
? semiconductor MSM63V89C 2/10 block diagram pin configuration (top view) 1 d in 13 v cc 2 we 3 test 4 nc 5 cs 9 sad 10 nc 11 sas 12 tas 26 v ss 14 rs/a 25 d out 24 test 23 nc 22 nc 18 rwck 17 nc 16 fam 15 rfsh nc : no connection 26/20-pin plastic tsop sin address register x-address counter pout clock load clock refresh counter clock timing generator refresh timer address multiplexer x-decoder/ driver y-decoder/sense amp y-address counter reset clock 1,048,576 data register write clock generator i/o controller v bb generator sad cs sas fam rwck test rfsh rs/a tas we d out d in v ss v cc test
? semiconductor MSM63V89C 3/10 pin descriptions data input pin description 1 write enable 2 test input 3, 24 chip select 5 serial address data 9 serial address strobe 11 transfer address strobe 12 power supply (3.3 v) 13 auto-refresh/self-refresh select 14 refresh clock input 15 fast access mode select 16 read/write clock 18 data output 25 ground (0 v) 26 symbol d in we test cs sad sas tas v cc rs/a rfsh fam rwck d out v ss
? semiconductor MSM63V89C 4/10 absolute maximum ratings parameter symbol condition rating unit terminal voltage v t t a = 25c, relative to v ss C1.0 to +7.0 v output short-circuit current i os t a = 25c 50 ma power dissipation p d t a = 25c 1 w operating temperature t op 0 to 70 c storage temperature t stg C55 to +150 c recommended operating conditions electrical characteristics dc characteristics parameter symbol min. typ. max. unit supply voltage v cc 2.7 3.3 3.6 v supply voltage v ss 000v v ih v cc C 0.5 v cc v cc + 0.5 v v il C0.5 0 +0.5 v "h" input voltage "l" input voltage (ta = 0 to 70c) parameter symbol condition min. max. unit "h" output voltage v oh i oh = C0.5 ma v cc C 0.5 v "l" output voltage v ol i ol = 0.5 ma 0.4 v input leakage current i li v i = 0 v to v cc C1 +1 m a output leakage current i lo v o = 0 v to v cc C1 +1 m a supply current (in operating state) i cc1 v cc = 3 v, t rwc = 2 s 3 ma supply current (fam) i cc3 v cc = 3 v, t rwc = 0.4 m s 10 ma supply current (in standby state) i cc2 v cc = 3 v 50 m a (v cc = 2.7 v to 3.6 v, ta = 0 to 70c)
? semiconductor MSM63V89C 5/10 ac characteristics note: switching to the fast mode should be made satisfying the timings of t fs and t ss at the "l" level of rwck . parameter symbol min. max. min. max. unit MSM63V89C-self MSM63V89C-auto 100 refresh cycle t ref ms 4,000 2,000 read/write cycle time t rwc ns 3,000 1,500 access time t acc ns 050050 output turn-off delay time t off ns 350350 input signal rise/fall time t t ns 1,000 500 rwck precharge time t rwp ns 3,000 10,000 1,500 10,000 rwck pulse width t rw ns 100 100 sas cycle time t ssc ns 5050 sas pulse width t sas ns 5050 sas precharge time t sap ns 00 address setup time t as ns 5050 address hold time t ah ns 5050 tas setup time t ats ns 5050 tas to rwck setup time t trs ns 5050 tas pulse width t tas ns 00 read command setup time t rrs ns 5050 read command hold time t rrh ns 00 write command setup time t wrs ns 5050 write command hold time t wrh ns 5050 write command pulse width t wp ns 5050 we to rwck lead time t rwl ns 00 data setup time t ds ns 5050 data hold time t dh ns 100 100 rwck to we delay time t rwd ns 500 rfsh setup time t rfs ns 500 rfsh precharge time t rfp ns 1,500 10,000 rfsh pulse width t rf ns 500 rfsh rwck precharge time t rrp ns 400 400 fast mode cycle time t fc ns 300 300 fast rwck mode access time t fac ns 100 100 fast rwck precharge time t fcp ns 300 300 fast mode rwck pulse width t fr ns 00 fast mode setup time t fs ns 5050 fast mode hold time t fh ns 4,000 100,000 2,000 100,000 fast mode width t fcc ns 00 slow mode setup time t ss ns 5050 slow mode hold time t sh ns (v cc = 2.7 v to 3.6 v, ta = 0 to 70c)
? semiconductor MSM63V89C 6/10 timing diagrams read/write/read modify write cycle cs t rw t rwf t rw t rwc t sas t ssc t sap t trs t as t ah a0 a1 a2 a9 t tas t ats t rrs t rrh t rwd t wp t rwl t wrs t wrh t ds t dh t ds t dh dy1 dy2 t acc t off xny0 xny1 high-z rwck sas sad tas we d in d out
? semiconductor MSM63V89C 7/10 auto-refresh mode cs rwck we d in tas d out rs / a rfsh t rfs t rrp t rf t rfp xny0 xny1 xny2 xny4 xny5 xny6 xny7 fast access mode cs sas sad tas rwck fam d out t fr t fcp t fs t ss t fcc t sh t fac xny0 yn+1 yn+3 ym+1 ym+3 ym+4 y1021 C y1023 y0y2 y3y4 xn+1y5 xnyn yn+2 ym+2 ym+5 y1022 xn+1 y1 xn+1y6
? semiconductor MSM63V89C 8/10 functional description serial address input (sad) pin for inputting the start address for read/write. address data can be input in units of 1024 words. the 1,024 address data can be input as 10-bit (a0-a9) serial from the sad pin. serial address strobe ( sas ) pin for the clock used to store the serial address data into the internal register. address transfer strobe ( tas ) input pin for setting the serial address data stored in the address register to the internal address counter. when the tas falls, the y address is set to address 0. read/write clock ( rwck ) input pin for the data register information read/write clock. internal operation starts at the falling edge of rwck . the information in the data register is output to the dout pin in the read mode, and the information at the din pin is written into the data register in the write mode. the internal address counter is automatically incremented when rwck falls. write enable ( we ) input pin for selecting the read mode, write mode or read modify write mode. the read mode is set when we is "h", and the write mode is set when we is "l". when we falls from "h" to "l" while rwck is active, the read modify write mode is set. data input (d in ) input pin for write data. the information at the data input pin is stored at the falling edge of rwck in the write mode, and at the falling edge of we in the read modify write mode. data output (d out ) the data output pin is always kept in the high impedance state when rwck or cs is kept at "h". when "h" or "l" information is read in the read operation, the output pin is set to "h" to "l" and holds the read information until rwck is again set to "h". in the early write mode the output pin maintains the high impedance state, so i/o common operation by connecting d in and d out is possible. self/auto refresh select ( rs/a ) pin for selecting a refresh mode in order to retain memory cell data. if the rs/a pin is set to "l" level, the self-refresh mode is selected and no external refresh control is required. if the rs/a pin is set to "h" level, the auto-refresh mode is selected and refresh operation is required to retain memory cell data. refresh clock input ( rfsh ) input pin for controlling the external refresh when the auto refresh mode is selected. when the auto- refresh mode is selected, 1024 refresh operations are required within 100ms via the rfsh pin while the rwck is at "h" level.
? semiconductor MSM63V89C 9/10 fast access mode select ( fam ) pin for fast read/write operations. fast read/write is possible by keeping the fam pin at "l" level. the fast access mode is set or released by inputting "l" level or "h" level to the fam pin when the rwck pin is at "l" level, and when t fs and t ss are satisfied. when 1024-word data access is complete, be sure to insert a normal cycle in order to increment the x address. chip select ( cs ) input pin for disabling all input and output pins. this pin enables parallel use of multiple MSM63V89Cs by connecting the data input and output pins. test ( test ) the test pin is fixed to "h" level. turning the power on to stabilize the device, it is required to pause for over 100 m s after the v cc reaches the specified voltage. then it is needed to add eight or more rwck cycles (read cycles or pseudo data write cycles).
? semiconductor MSM63V89C 10/10 (unit : mm) package dimensions notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). tsop ii 26/20-p-300-1.27-k package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 0.38 typ. mirror finish
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